We are looking for passionate and experienced SoC Design Verification Engineers to join our growing team and work on cutting-edge ASIC/SoC and IP development projects.
? Key Responsibilities:
• Hands on Experience of 6+yrs in DV.
• Perform functional verification of SoC using System Verilog and methodologies such as UVM / OVM / VMM
• Develop, maintain, and enhance testbenches, test cases, and assertions
• Drive metric-driven verification including planning, execution, and closure
• Work on functional and code coverage, regression runs, and debug complex issues
• Collaborate with cross-functional teams and ASIC/SoC project leads in a multi-site environment
• Contribute to building robust and scalable verification environments
? Required Skills & Experience:
• Strong experience in SoC / Subsystem / IP level verification
• Hands on Experience of high-speed interface protocols (PCIe, USB, Ethernet, etc.)
• Hands-on experience with verification planning and execution
• Strong debugging and problem-solving skills
• Ability to work independently as well as in a collaborative team environment
• Experience across unit-level, subsystem-level, and top-level verification
? What We’re Looking For:
• Self-driven individuals who can solve problems of moderate complexity
• Robust team players who can also handle independent tasks efficiently
• Engineers passionate about building high-quality silicon