Design For Test (DFT) Engineer
Location: Bangalore
Experience: 6–12 years

Join MediaTek’s industry-leading DFT team
We are looking for skilled and motivated DFT Engineers with 6–12 years of experience to join our Engineering team. If you thrive in a collaborative environment and have a strong track record in DFT implementation and design, we encourage you to apply

Key Responsibilities:
Lead and contribute to DFT implementation for complex SOCs
Drive robust integration and collaborate on STA, LEC, CLP, and project-wide DFT activities
Apply advanced IJTAG understanding and debug skills at the top DFT level
Spearhead ATPG coverage improvement, timing simulations, and post-silicon debugging
Guide and mentor small teams, ensuring timely task closure and effective stakeholder communication

Key Requirements:




6–12 years of hands-on DFT experience (E08/E09 candidates)
Deep knowledge in DFT, STA (Static Timing Analysis), LEC (Logic Equivalence Check), CLP, and system integration
Strong experience with IJTAG and proficiency in debugging through the complete DFT flow
ATPG (Automatic Test Pattern Generation) expertise, especially in coverage, timing, and real silicon debug
Proven leadership in team management and project delivery

Why MediaTek?
Be a part of an innovative, quick-growing environment with opportunities to work on world-class projects and cutting-edge technology

Ready to make your mark?
Apply Today

📌 DFT Engineer (Bengaluru)
🏢 MediaTek
📍 Bengaluru