Standard Cell Circuit Design Engineer (Bengaluru)

Standard Cell Circuit Design Engineer (Bengaluru)

06 Aug
|
Weekday AI
|
Bengaluru

06 Aug

Weekday AI

Bengaluru

This role is for one of the Weekday's clients
Salary range: Rs 4000000 - Rs 25000000 (ie INR 40-250 LPA)
Experience: 10+ yrs
Location: Bangalore, Bengaluru
Job Type: Full-Time
We are seeking an experienced Standard Cell Circuit Design Engineer with deep expertise in designing high-performance, low-power standard cell libraries for advanced semiconductor technology nodes. This role is ideal for professionals who have a strong background in transistor-level circuit design, library characterization, validation, and optimization, along with the ability to collaborate across layout, CAD, PDK, and physical design teams.
The successful candidate will play a key role in developing robust standard cell libraries that meet stringent power, performance, and area (PPA) requirements for next-generation semiconductor products. This position offers the opportunity to work on cutting-edge FinFET technologies while contributing to high-quality silicon development through innovative circuit design and technical leadership.
Key Responsibilities
Design and develop high-performance, low-power,



and area-efficient standard cell libraries for advanced technology nodes.
Create and optimize a wide range of standard cells, including combinational and sequential logic, flip-flops, latches, clock gating cells, level shifters, isolation cells, retention cells, multi-bit flip-flops, and clock buffers.
Perform transistor-level circuit design, simulation, optimization, and verification using industry-standard EDA tools.
Optimize circuits for timing, leakage power, energetic power consumption, signal integrity, noise immunity, and overall reliability.
Collaborate closely with layout engineers to achieve optimal layouts while ensuring compliance with DRC, LVS, and ERC requirements.
Drive library characterization, validation, and quality assurance across multiple process, voltage, and temperature (PVT) corners.
Analyze and resolve issues related to process variation, EM/IR, aging effects, ESD, latch-up,

📌 Standard Cell Circuit Design Engineer (Bengaluru)
🏢 Weekday AI
📍 Bengaluru

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