IP verification engineer

Experience: Not Available to Not Available years

Location: Bangalore

Skills: SystemVerilog, UVM, Verilog, Functional verification methodologies, Assertions (SVA), coverage, interconnect protocols, AXI, AHB, CHI, PCIE, debugging complex RTL, testbench issues, Formal verification

Company Overview
In this role you will be responsible for verifying complex IPs involving memory controllers, and interconnects, collaborating with global design and architecture teams.

Key Responsibilities
Develop and execute verification plans for memory controllers, interconnects and other infrastructural IPs
Build scalable SystemVerilog/UVM-based verification environments with reusable UVM components (agents, monitors, scoreboards)
Own end-to-end IP verification sign-off




Achieve high-quality metrics including functional coverage and code coverage
Manage regressions and debug failures
Collaborate closely with design teams to resolve issues

Required expertise
Strong experience in SystemVerilog, UVM, and Verilog
Good understanding of Functional verification methodologies, Assertions (SVA) and coverage
Positive understanding of interconnect protocols such as AXI, AHB, CHI and PCIE
Experience debugging complex RTL and testbench issues
Experience in Formal verification is an added plus

More information about NXP in India... #LI-29f4

📌 IP verification engineer (Bengaluru)
🏢 NXP Semiconductors
📍 Bengaluru