Subsystem/SoC Level Verification Engineer

Experience: 12 to 15 years

Location: IND-Bangalore Electronic City - S1

Skills: System Verilog, UVM, BFMs, Checkers, monitors, Scoreboards, block level verification, system level verification, debugging, code coverage, functional coverage, constrained random verification, Ethernet, MAC, PCS, SerDes, Gate-level simulations, SDF simulations, Perl, Tcl, Cadence, Synopsys

Job Description
He/she should have strong knowledge of the following with 12-15 years of experience in Ethernet Subsystem/SoC Level Functional verification Working experience in Ethernet Subsystem/SoC verification Expertise to develop verification environments using System Verilog and UVM Expertise to develop BFMs / Checkers / monitors / Scoreboards Must have developed block/system level verification plans and tests. Must have capability to debug test failures to find the root cause. Must have worked on code / functional coverage. Experience in constrained random verification. Domain skills: Ethernet (MAC,



PCS and SerDes)/SoC verification Gate-level /SDF simulations Knowledge of scripting languages like Perl, Tcl Versatile to work in any IP/Subsystem/SoC projects CAD Tools: Cadence/Synopsys

Education Qualification
Bachelors/Master’s in Electronics/Computer Engg

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

📌 Subsystem/SoC Level Verification Engineer (Bengaluru)
🏢 Broadcom
📍 Bengaluru