About Analog Devices Analog Devices Inc NASDAQ ADI is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge ADI combines analog digital and software technologies into solutions that help drive advancements in digitized factories mobility and digital healthcare combat climate change and reliably connect humans and the world With revenue of more than 9 billion in FY24 and approximately 24 000 people globally ADI ensures today s innovators stay Ahead of What s Possible TM Learn more at www analog com and on LinkedIn and Twitter X Role Overview As a Senior Physical Design Engineer at Analog Devices you will play a key role in delivering complex ASIC and SoC designs across multiple technology nodes directly supporting ADI s mission of innovation and impact You will lead challenging floorplanning place-and-route PNR timing closure and physical verification activities while collaborating across functions to drive on-time high-quality tapeouts Your work will embody ADI s core values of Agility Impact Leadership and Innovation Key Responsibilities Own end-to-end physical implementation for major IP blocks and or full-chip designs ensuring alignment with ADI s Career Development Framework Expertise Autonomy Scope Business Impact Develop and optimize floorplans macro placement IO ring planning power grid design congestion area timing analysis leveraging advanced nodes 16nm 7nm 5nm etc Execute place-and-route clock tree synthesis and timing closure using industry-standard tools Cadence Innovus Perform detailed static timing analysis STA and drive sign-off across PVT corners and operating modes Identify and resolve physical verification issues DRC LVS ERC in close partnership with process CAD foundry teams ensuring robust manufacturability Automate design flows e g hierarchical PNR IO ring automation Flash PG to improve efficiency and quality contribute to continuous flow enhancements Collaborate with RTL DFT verification package and library teams to meet performance power and area PPA targets and project milestones Mentor and coach junior engineers sharing best practices in physical design and advancing team capability Document methodologies and contribute to best practices supporting a culture of learning and continuous improvement Demonstrate ADI values by being agile in adapting to changing business needs leading by example and striving for best-in-class results Required Qualifications Bachelor s or Master s in Electrical Electronics Engineering or related discipline 5 years of hands-on experience in advanced ASIC SoC physical design ideally including work at 16nm and below Robust proficiency in floorplanning PNR STA and physical verification using industry EDA tools Experience developing or deploying automated flows Tcl Perl Python to improve design productivity Deep understanding of fabrication process limitations ESD IR EM analysis and robust sign-off methodologies Demonstrated ability to communicate clearly collaborate cross-functionally and work effectively in a fast-paced innovative environment Preferred Qualifications Experience with hierarchical design and large-scale SoC integration Background in low power and multi-voltage design methodologies UPF CPF For positions requiring access to technical data Analog Devices Inc may have to obtain export licensing approval from the U S Department of Commerce - Bureau of Industry and Security and or the U S Department of State - Directorate of Defense Trade Controls As such applicants for this position - except US Citizens US Permanent Residents and protected individuals as defined by 8 U S C 1324b a 3 - may have to go through an export licensing review process Analog Devices is an equal opportunity employer We foster a culture where everyone has an opportunity to succeed regardless of their race color religion age ancestry national origin social or ethnic origin sex sexual orientation gender gender identity gender expression marital status pregnancy parental status disability medical condition genetic information military or veteran status union membership and political affiliation or any other legally protected group Job Req Type Experienced Required Travel Yes 10 of the time Shift Type 1st Shift Days