We are hiring for one of our reputed clients for the following position.
If you're interested and your experience matches the requirement, we'd love to hear from you.
Position: Verification Engineer
Experience: 2-4 Years
Location: Hyderabad
Contract tenure: 1 year contract
Description:
Project - For Vivado implementation flow testing and QOR analysis
To validate, test Vivado Implementation flow stages like placer, Static Timing Analysis. Person expected to have prior Vivado tool knowledge and FPGA flow awareness. Any EDA company experience is nice to have
Digital design, Logic Design, STA, Design Constraints, Debug skills are basic requirements
Qualifications & Experiences:
- Bachelors or Masters in ECE, EE, EI, VLSI
- Min 2yrs, Max 4yrs
- Experience in Xilinx Vivado flow, specifically Implementation tool flow
- Experience in FPGA design flow, STA, Logic and System design
- Positive to have automation skills and AI usage knowledge.