Title: SOC DV Engineer with experience in Sensors , CPU , Debug Architecture
Role And Responsibilities Job Title: SOC Verification Engineer
Exp:4 to 12 yrs
Location:Bangalore
Key Requirements 4 12 years of SOC Design Verification (DV) experience with a robust focus on GPIO, sensos , CPU core verification, Debug Architecture, and eFuse verification.
Must possess solid knowledge of verification methodologies, testbench development, and coverage analysis for SOC projects.
Experience with SystemVerilog/UVM, scripting, and hardware debugging tools is essential.
Strong problem solving skills and the ability to work collaboratively in a cross functional team are required.
Skill Requirements : GPIO, Sensor ,Debug Architecture, and eFuse , SOC DV
Good to have : CPU core verification , Frequency Monitors