About the Role: The SI/PI Engineer will be responsible for analyzing, designing, and validating high‑speed digital signal and power delivery networks to ensure robust system performance. The role focuses on maintaining signal quality, minimizing noise, controlling impedance, and ensuring reliable power distribution across complex electronic systems.

Responsibilities: Signal Integrity (SI)

Perform SI analysis for high‑speed interfaces such as DDR, PCIe, Ethernet, SERDES, LVDS, USB, HDMI, and similar protocols

Analyze and optimize signal quality parameters including jitter, eye diagram, crosstalk, reflections, and skew

Define routing constraints, impedance control, termination schemes, and stack‑up recommendations

Review PCB layouts and provide SI‑driven design feedback to layout teams Power Integrity (PI)

Design and analyze Power Delivery Networks (PDN) for low noise and stable voltage delivery

Perform decoupling capacitor selection, placement, and optimization

Analyze power plane impedance, IR drop, and transient response

Support switching regulator and point‑of‑load (POL) power architecture considerations Simulation & Analysis

Run pre‑layout and post‑layout SI/PI simulations

Perform What‑if analysis to assess design trade‑offs

Correlate simulation results with lab measurements Validation & Debug

Support lab validation using high‑speed measurement tools





Analyze and debug SI/PI issues during board bring‑up

Drive root cause analysis for signal and power related failures Documentation & Collaboration

Create SI/PI guidelines, design checklists, and reports

Work closely with schematic designers, PCB layout engineers, FPGA/SoC teams, and system engineers

Participate in design reviews and ensure compliance with signal/power integrity best practices Qualifications: Education: Master’s degree in Electronics Engineering, Electrical Engineering, Microelectronics or a related discipline

Experience: 2-4 years of experience in SI/PI engineering for high‑speed digital systems

Hands‑on experience: with PCB‑level SI/PI analysis and validation Required Skills: Technical Skills: Expertise in:

Transmission line theory

Eye diagram analysis

Crosstalk

EMI/EMC fundamentals

High‑speed timing and jitter analysis

Solid understanding of: PDN design, Decoupling strategies, Target impedance methodology, DC drop and transient current analysis

Tools (Any of the following): SI/PI simulation tools: Ansys SIwave / HFSS, Cadence Sigrity, Keysight ADS, PCB design tool familiarity: Cadence Allegro / Altium, Lab equipment: High‑bandwidth oscilloscopes, TDR/TDT, Network analyzers Preferred Skills:

Desirable : Knowledge of EMC/EMI compliance and mitigation

📌 Signal Integrity Engineer (Nagpur)
🏢 Solar Industries India
📍 Nagpur