Senior Designer - DFT

Experience: Not Available to Not Available years

Location: Bengaluru, India

Skills: Scan insertion, ATPG, MBIST, LBIST, JTAG, Boundary Scan, Fault models, Test coverage analysis, Tessent, DFT Compiler, Modus, TCL, Perl, Python scripting, Low-power DFT, Compression architectures, ATE, Tester bring-up knowledge

Job Summary

DFT Engineers implement test structures and methodologies to improve manufacturability and testability of ASIC designs.

Key Responsibilities

- Insert scan chains and compression logic
- Implement ATPG and MBIST/LBIST solutions
- Generate and validate test patterns
- Perform DFT rule checks and coverage analysis
- Debug scan and pattern failures
- Support silicon bring-up and production testing
- Collaborate with RTL and PD teams for DFT closure

Skill Requirements

- Scan insertion and ATPG concepts
- MBIST/LBIST/JTAG/Boundary Scan
- Fault models and test coverage analysis
- Tools: Tessent, DFT Compiler, Modus
- TCL/Perl/Python scripting

Other Requirements

- Low-power DFT
- Compression architectures
- ATE and tester bring-up knowledge

📌 Senior Designer DFT (India)
🏢 HCL Technologies
📍 India