Memory Layout Design Engineer (Bengaluru)

Memory Layout Design Engineer (Bengaluru)

06 Aug
|
Mirafra
|
Bengaluru

06 Aug

Mirafra

Bengaluru

- Development of key building blocks of memory architecture such as Row Decoder, IO, Control.
- Skilled in pitched layout concepts, floor planning for Placement, Power and Global Routing.
- Knowledge of EM/IR requirements. Compiler level integration, verification of Compiler/Custom memories.
- Should possess valuable knowledge on CMOS fabrication process, foundries and challenges in latest technology nodes

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Memory Layout Design Engineer (Bengaluru)
🏢 Mirafra
📍 Bengaluru

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