- 10+ years of experience in SOC verification and UVM setting development with ARM Processor ( U 85/ U 65/ M55 );
- Proficient in test plan definition and testcase development in C/Assembly/SystemVerilog;
- Expertise in verifying design at RTL level and gate-level simulation;
- Good understanding of coverage analysis, performance verification and use-case verification;
- Experience in functional test vector development and post-silicon bring-up/debug;
- Fluency with scripting languages (e.g., Perl, Python, Shell); and
- Preferred: knowledge of Power Aware verification is a plus.