Responsibilities

- Bug fixing of existing firmware code base based on the bug reported by QA and field team.

- Proof of functionality via functional test-benches and synthesis tool timing closure.

- Develop and carry out firmware and hardware tests.

- Documentation and support of designs within a project environment.

Qualifications

:

- 8 Yrs of Experience of FPGA logic design within a commercial environment for RAN Products (This is a MUST).

Required Skills

:

- Strong knowledge on digital design and excellent Verilog/VHDL coding skills.

- Experience with Modelsim, Vivado, Quartus tools for simulation and timing closure.

- Experience of developing and implementation of DSP designs for Radio within FPGAs.

- Good understanding of CPRI, channel filters, DUC, DDC, CFR, DPD, AGC, FFT, IFFT, PRACH,



PDSCH, PUSCH, beamforming concepts.

- Experience in implementing and debugging Multi-gigabit designs (10/25 GB/s Ethernet, JESD204, or similar) packet data processing and routing.

- Working experience with O-RAN/CPRI interface design is a must.

- Experience and knowledge of modelling tools such as Matlab and Simulink.

- Knowledge and experience of remote radio or baseband signal processing (UMTS, WiMAX, LTE, 5G) or equivalent.

- Experience in developing and debugging combined hardware and software products within a multi-disciplinary team setting.

📌 FPGA Design (Bengaluru)
🏢 Capgemini Engineering
📍 Bengaluru