CPU Design Verification Engineer to join our semiconductor team in Bangalore. The ideal candidate should have robust expertise in CPU verification methodologies, SystemVerilog, and UVM with hands-on experience in verification of complex SoC/IP designs.
Key Responsibilities:
- Develop and execute verification plans for CPU/IP blocks.
- Design and implement reusable UVM-based verification environments.
- Develop test cases, assertions, scoreboards, and functional coverage.
- Perform debugging of simulation failures and root cause analysis.
- Collaborate with design, architecture, and validation teams to ensure first-pass silicon success.
- Track verification metrics, coverage closure, and bug resolution.
Required Skills:
- 3–5+ years of experience in Design Verification.
- Strong knowledge of
SystemVerilog and
UVM
.
- Experience in
CPU/Processor verification
.
- Good understanding of computer architecture and processor pipelines.
- Experience with simulation and debugging tools (VCS, Xcelium, Questa, etc.).
- Knowledge of assertions (SVA), coverage-driven verification, and scripting (Python/Perl/Shell) is preferred.
Preferred Qualifications:
- Bachelor's or Master's degree in Electronics/ECE/Computer Engineering.
- Excellent debugging and problem-solving skills.
- Good communication and teamwork abilities.
📌 CPU Design Verification (DV) Engineer (Bengaluru)
🏢 Veritis Group
📍 Bengaluru
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