Introduction As a Verification Engineer for IBM server processors , you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today’s market.

Your Role And Responsibilities As a Functional verification engineer for IBM server processors you will be responsible for developing test architectures, drivers, and checkers to test and verify designs used in these systems.

Lead the development of the verification plans, environment, testbenches and writing testcases for the Unit level and System level in IBM Server Processors. Develop skills in IBM Functional verification tools and methodologies.

Work with design as well as other key stakeholders in debugging and fixing logic design issues and deliver a quality design Work with development team to ensure coverage criteria is met Preferred Education Master's Degree Required Technical And Professional Expertise 5+ years of experience in the following areas

Computer architecture knowledge, Processor Core, Cache and Un core design specifications, instruction set architecture and logic verification. Core or Uncore architecture/micro-architecture verification for Server Processors or SoCs

System level and unit level verification expertise Multi-processor Cache Coherency/Network on Chip/Memory Hierarchy verification.





AXI/AHB/ACE/ACE-lite/CHI/On Chip System Fabric interface verification or any other Processor/SoC coherency transport interconnect fabric verification.

Minimum one full life cycle leadership experience of a processor/SoC verification flow with focus on Coherency Transport Interconnect and/or Network on Chip Verification

Strong object-oriented programming skills in C++/SystermVerilog, scripting languages like Python/Perl.

Verification knowledge in Clock domain crossing and reset domain crossing

Knowledge of functional verification methodology like UVM/OVM

Knowledge of HDLs (VHDL/Verilog)

Developed test plans and test strategies for IP/unit/block level verification of Coherency Transport Interconnects

Worked on multiple levels of verification (unit/element/sub-system/system level)

Development experience on Linux/Unix environments, GIT repositories and good understanding of Continuous Integration and DevOps workflow

Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails

Experience in driving verification coverage closure.

Preferred Technical And Professional Experience

Stress testing and ability to identify corner case scenarios and System level and unit level verification.

Positive understanding of computer system architecture and microarchitecture.

Knowledge in IP Integration and SoC level verification.

Knowledge of design patterns in programming

📌 Coherency Functional Verification Engineer (Bengaluru)
🏢 IBM
📍 Bengaluru