Person having 3+ years experience in standard cell design and verification. He / she should be having sound knowledge of different types of standard cells (Combinational, sequential Level shifters etc) and verifications of the same. He / She should be able to benchmark different standard cells for PPA. Awareness of digital flow will be a plus. Person is supposed to work with and guide other junior members in design and layout domain.
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📌 Associate III - VLSI (Noida)
🏢 UST
📍 Noida
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