- Robust expertise in Verilog coding is required.
- Must have hands-on experience in synthesis.
- Experience with scan insertion is required.
- Familiarity with SpyGlass CDC/RDC tools is mandatory.
- Ability to perform micro-architecture development and coding based on design specifications.
Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
📌 RTL ENGINEER (Noida)
🏢 incise infotech
📍 Noida
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