We're Hiring | Senior SoC Verification Engineer |Technogen
Hello #Connections,
We're looking for an experienced Senior SoC Verification Engineer to join our team at Technogen.
Required Skills:
10+ Years of SoC/ASIC Verification Experience
UVM & SystemVerilog
ARM Processor Verification (U85/U65/M55)
RTL & Gate-Level Verification
Test Plan & Testcase Development (C/Assembly/SystemVerilog)
Coverage Analysis & Performance Verification
Functional Test Vector Development
Post-Silicon Bring-up & Debug
#Python / #Perl / Shell Scripting
Location: #Hyderabad (India)
Experience : 10+ (Only )
Mode of work : WFO (5 Days)
Experience: 10+ Years
If you're interested or know someone who fits this role, please share your updated resume at [email protected]
References are highly appreciated!
#Hiring #HiringNow #Axiado #SoC #ASIC #DesignVerification #UVM #SystemVerilog #ARM #RTLVerification #GateLevelSimulation #PostSilicon #Semiconductor #VLSI #VerificationEngineer #Python #Perl #HyderabadJobs #SemiconductorJobs #TechJobs

📌 Senior Staff Verification Engineer (Hyderabad)
🏢 TechnoGen
📍 Hyderabad