Roles and Responsibilities :

- - Develop and execute post-silicon validation and bring-up plans for complex SoCs.
- Utilize ZeBu and/or Palladium emulation platforms for pre-silicon and post-silicon validation activities.
- Create, debug, and optimize validation test cases for subsystem and full-chip verification.
- Perform hardware-software co-validation and system-level debugging.
- Analyze failures, identify root causes, and collaborate with RTL, DV, DFT, and firmware teams to resolve issues.
- Develop automation frameworks and scripts for validation, regression, and debug activities.

Job Requirements :

- 3-8 years of experience in SOC engineering or related field.

- Hands-on experience with Cadence Palladium and/or Synopsys ZeBu emulation platforms.
- Experience in post-silicon validation, chip bring-up, and hardware debugging.
- Knowledge of RTL design and verification methodologies.
- Solid debugging skills involving Verilog/SystemVerilog waveforms.

-

📌 SOC Emulation Engineer (Bengaluru)
🏢 UST
📍 Bengaluru