Principal Design Engineer - Verification - [ID 017] (Pune)

Principal Design Engineer - Verification - [ID 017] (Pune)

07 Aug
|
Vitestork Consulting
|
Pune

07 Aug

Vitestork Consulting

Pune

1) Principal Design Engineer - Verification - [ID 017] Job Description

- Experience: Require 8+ years of experience in verification and design, specifically with IP development.
- Technical Expertise: Solid background in digital electronics, Verilog/SystemVerilog, and UVM methodology.
- Protocol Knowledge: Practical knowledge of memory or communication interface IP protocols such as MIPI (CSI2/DSI/I3C/PHY), PCI Express, DDR, LPDDR, HBM, or USB.
- Skills: Excellent debugging skills, ability to handle complex problems, and proficiency in scripting languages (TCL, Perl, or Python).
- Education: Bachelor's or Master's in Electronics or Electrical Engineering.

Skills: PCI Express, DDR, LPDDR, HBM, or USB. Job Location: Pune Experience: 8+ Yrs Company Name: EDA Semiconductor RD

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Principal Design Engineer - Verification - [ID 017] (Pune)
🏢 Vitestork Consulting
📍 Pune

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