Job Description

Job Summary

We are looking for a skilled and motivated DFT (Design for Testability) Engineer with 3 5 years of experience in ASIC/SoC design and verification.

The ideal candidate should have hands-on expertise in DFT implementation, scan insertion, ATPG, and debugging activities for complex semiconductor designs.

Key Responsibilities

- Develop and implement DFT architectures for ASIC/SoC designs.
- Perform scan insertion, ATPG generation, and fault coverage analysis.
- Work on MBIST/LBIST implementation and validation.
- Collaborate with RTL, Physical Design, and Verification teams to ensure DFT readiness.
- Analyze and debug scan chain, pattern, and silicon-related issues.
- Support post-silicon validation and production testing activities.
- Ensure test coverage targets and quality metrics are achieved.
- Create and maintain DFT documentation and reports.
- Required Skills Qualifications

Bachelor s or Master s degree in Electronics/Electrical Engineering or a related field.

- 3 5 years of hands-on experience in DFT engineering.
- Strong knowledge of:
- Scan architecture and scan compression
- ATPG methodologies
- MBIST/LBIST concepts
- JTAG/Boundary Scan




- Fault models and test coverage analysis

- Experience with industry-standard tools such as:

- Synopsys DFT Compiler / Tetramax / TestMAX
- Cadence Modus
- Mentor Tessent

- Valuable understanding of RTL design, Verilog/SystemVerilog, and ASIC design flow.
- Experience in debugging DFT and silicon bring-up issues.
- Strong analytical and problem-solving skills.
- Preferred Skills

- Experience with low-power DFT techniques.
- Knowledge of scripting languages such as Perl, Tcl, or Python.
- Exposure to STA and physical design constraints related to DFT.
- Positive communication and teamwork skills.
- What We Offer

- Opportunity to work on cutting-edge semiconductor technologies.
- Collaborative and innovation-driven work environment.
- Competitive salary and growth opportunities.

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 DFT Engineer (Chennai)
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