Job Summary

The Mixed Signal Development Group is responsible for delivering high-speed analog and mixed-signal IP to divisions within Microchip. We work with leading edge CMOS processes to produce analog integrated circuits for wireline applications. From PCIe to 128+Gb/s SERDES, we enable technology that allows Microchip's products to interface to the outside world.

As a member of the Mixed-Signal Development Group, the candidate will be supervised by a team manager, and be engaged in the package design and layout.

Responsibilities

- Conduct package routing feasibility and substrate layouts for Microchip high-speed products, including MCM packages
- Perform easy PCB breakout studies for ball map feasibility
- Identify key issues for proposed designs based on silicon floor plans and desired package sizes
- Work with signal integrity engineers to implement high speed signal routes and quiet power routes
- Work with reliability engineers and external vendors to ensure manufacturability of package designs
- Create package routing constraints based on signal integrity routing rules




- Interact with and oversee work of external and internal package designers
- Produce package routing reports and diagrams for review by external teams
- Create and track package design schedules
- Guide and assist external design teams on creation of input data for package design flow.

Requirements/Qualifications
- Applicable Bachelor's or Master's Degree
- 10+ years of industry experience
- Expert in package design using Cadence APD
- Expert in authoring APD design rules
- Scripting in PERL or SKILL is an asset
- Familiarity with flip chip and wire bond package designs
- Familiarity with PCB design and BGA fanout issues
- Understanding of high speed and power routing rules/issues
- Capable of handling multiple tasks at once
- Customer oriented, with attention to detail

Travel Time

0% - 25%

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Principal, IC Package Engineer (Chennai)
🏢 Microchip Technology
📍 Chennai