- TSMC 2nm Layout design of analog and mixed signal blocks
- Floor planning, track planning, PG planning, device matching
- Digital logic implementation with VSR router
- DRC, LVS, Antenna, ERC PV verifications
Qualifications Experiences:
- 4+ years of experience
- Experience with TSMC 3nm and below nodes
- Well versed with Cadence latest GXL and VSR router
- Well versed with Calibre PV on lower technologies
- Excellent layout skills such as device matching, routing matching
- Ability to design hierarchical layouts
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