Design Verification Engineer

IMMEDIATE JOINERS

Experience: 4-11 Years | Location: Bengaluru

Employment Type: Full-Time

Role Summary

We are seeking experienced Design Verification Engineers with strong UVM expertise for SoC/IP verification.

Key Responsibilities

- Develop verification plans.
- Build reusable UVM environments.
- Functional coverage closure.
- Assertions and debugging.
- Regression execution.
- Testbench development.
- Root cause analysis.
- Protocol verification.
- Customer interactions.
- Documentation.
- Verification signoff activities.
- Collaborate with RTL and PD teams.

Mandatory Technical Skills

- SystemVerilog
- UVM
- SVA
- Functional Coverage
- Protocol Verification (AMBA , AXI, APB, AHP)
- Expertise in Any Hi-Speed Bus protocols(PCIe, DDR, USB, Ethernet etc)
- Python/TCL

EDA Tools

- VCS
- Xcelium
- QuestaSim
- Verdi

Qualifications

Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field.

Soft Skills

Robust communication, analytical thinking, stakeholder management, problem solving and ability to work in global

teams.

📌 Design and Verification Engineer (Bengaluru)
🏢 Talent Corner HR Services
📍 Bengaluru