Senior Design Lead - AMS Verification, EMI/EMC Design, AMS Design

Experience: 6 to 12 years

Location: Bangalore, India

Skills: analog circuit design, mixed-signal IC development, Amplifiers, OTA, Op-Amps, Bandgap references, bias circuits, PLL, DLL, oscillators, LDOs, DC-DC converters, Buck, Boost, ADC, DAC, comparators, PVT corners, process technologies, circuit simulation, verification, DC simulation, AC simulation, transient simulation, noise simulation, stability simulation, Monte Carlo analysis, corner analysis, reliability checks, aging, EM, IR, EOS, burn-in, PSRR, SNR, ENOB, SFDR, phase noise, layout interaction, post-layout validation, LVS verification, DRC verification, post-layout extraction, PEX, sign-off simulations, debug, design optimization, stability, timing, distortion, delay, duty cycle, slew rate improvements, PPA, Power, Performance, Area, AMS integration, co-simulation, mixed-signal co-simulation, RTL, full-chip verification, design documentation, verification plans, block-level deliverables, timelines, technical leadership, mentoring, design reviews, best practices, design methodologies, EDA Tools, Cadence, Virtuoso, Spectre, Synopsys, HSPICE, PrimeSim, scripting, SKILL, Python, Perl, AMS flows, verification understanding, SERDES, high-speed, power management, analytical skills, problem-solving skills

Job Summary
Role Overview
We are looking for a Junior VLSI Analog Design Engineer with strong fundamentals in analog circuit design and a willingness to learn and contribute to complex mixed-signal IC development. The candidate will support senior designers in circuit design, simulation, and verification activities.

Key Responsibilities
1. Analog / Mixed-Signal Design
Design and develop high-performance analog and mixed-signal circuits such as:




• Amplifiers (OTA, Op-Amps)
• Bandgap references & bias circuits
• PLL/DLL, oscillators
• LDOs, DC-DC converters (Buck/Boost)
• ADC/DAC, comparators
Ensure robustness across PVT corners and process technologies (e.g., 180nm → FinFET nodes) _Analog_design& MSV
2. Circuit Simulation & Verification
Perform detailed simulations:
• DC, AC, transient, noise, stability
• Monte Carlo, corner analysis
• Reliability checks (aging, EM/IR, EOS, burn-in)
Validate design targets such as:
• PSRR, SNR, ENOB, SFDR, phase noise
3. Layout Interaction & Post-Layout Validation
Work closely with layout teams on:
• Floorplanning, matching, shielding, parasitic optimization
Perform:
• LVS/DRC verification
• Post-layout extraction (PEX) and sign-off simulations
4. Debug & Design Optimization
Identify and resolve performance issues:
• Stability, noise, timing, distortion
• Delay, duty cycle, slew rate improvements
Iterate designs to meet PPA (Power, Performance, Area) targets
5. AMS Integration & Co-Simulation
Interface with digital teams for:
• Mixed-signal co-simulation (RTL + analog)
• Full-chip verification
6. Documentation & Ownership
Prepare detailed design documentation:
• Specifications, design reports, verification plans
Own block-level deliverables and timelines
7. Technical Leadership
Mentor junior engineers




Lead design reviews and provide technical guidance
Drive best practices and design methodologies
Required Qualifications
Education:
B.Tech / M.Tech / Ph.D. in Electrical / Electronics Engineering
Experience:
6–12+ years in analog/mixed-signal IC design
Core Skills:
Solid fundamentals in analog circuit design
Deep understanding of device physics and CMOS design
Technical Skill Set
EDA Tools:
• Cadence (Virtuoso, Spectre)
• Synopsys (HSPICE / PrimeSim)
Simulation Expertise:
• DC / AC / transient / noise / stability
• Monte Carlo / corner / worst-case analysis
Technology Exposure:
Experience across technology nodes (e.g., 180nm to advanced nodes)
Additional Skills (Preferred):
• Scripting: SKILL / Python / Perl
• AMS flows and verification understanding
• Exposure to SERDES / high-speed / power management domains
Desired Competencies
Strong analytical and problem-solving skills
Ability to work independently and own deliverables
Effective communication across design, layout, and verification teams
Experience in customer-facing or cross-site collaboration
Typical Projects / Domains
• Power Management ICs (PMIC)
• High-speed SerDes / IO
• Data converters (ADC/DAC)
• PLL/DLL and clocking circuits
Role Differentiation (Senior Level)
Compared to mid-level engineers, this role requires:
• Ownership of complex blocks/subsystems
• Significant contribution to architecture decisions
• Mentoring and technical leadership responsibilities
• Hands-on + review-level expertise
Other Requirements
Any relevant certifications in AMS Verification, EMI/EMC Design, or AMS Design would be a plus.

📌 Senior Design Lead AMS Verification, EMI/EMC Design, AMS Design (Bengaluru)
🏢 HCL Technologies
📍 Bengaluru