We are seeking solid RTL designer with SOC Integration experience of 4-5 years from Product org. The role looks for various skills sets on Protocol like AXI, processor, Interconnect peripherals IP knowledge and design experience. The preference is for candidates who have delivered and worked for SOC design as IP lead and understands SOC requirements for a Subsystem IP (like constraints, quality, etc.). Strong understanding of digital/logic design that leads to Micro-architecture is a plus.
Key Responsibilities
- Develop IO peripheral Subsystem for Processor (ARM, RISC-V) subsystems for AMD/AECG SoCs.
- Experience in one of the protocol and integration of UFS, SDIO, Octal SPI needed
- Drive end-to-end Subsystem IP and SoC design collateral from concept to production.
- Collaborate with cross-functional team members
- Ensure timely delivery of projects while meeting quality standards.
- Provide strong technical solution to internal and external stakeholders.
Preferred Experience
- Proven experience in SOC design roles with focus on RTL design of subsystem IP for about 4-5 years
- Expertise in Micro-architecture design and presentation
- Expertise and strong understanding of RTL quality checks and constraints for Subsystem IP
- Excellent communication skill
- Strong analytical and problem-solving abilities, including designing experiments for performance
- Self-motivated and proactive in driving initiatives.
Academic Credentials
- Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.