Senior Research Fpga Design & Implementation For Cryptography Cdot Delhi

Senior Research Fpga Design & Implementation For Cryptography Cdot Delhi

07 Aug
|
National Institute for Smart Government (NISG)
|
Delhi

07 Aug

National Institute for Smart Government (NISG)

Delhi

Job Role Research Engineer/Senior Research Engineer FPGA Design & Implementation for Cryptography and Cyber-security Related Applications

Qualification

B.E/B.Tech or ME/MTech with 60% (Electronics & Communication/Computer Science/Electrical/Electronics & Instrumentation/Information Technology/Very large Scale Integrated /Electronics & Telecommunication/ Communication Engineering/ Mathematics & Computing/ Cyber Security/ Cryptology or Equivalent)

OR

PhD (with Thesis in the domain of this post)

Experience

With Minimum 1 year experience(industry/academic) in the domain of this post.

Experience is not mandatory for candidates having a PhD or Masters Degree with Thesis in the domain of this post

Skills





RTL coding and simulation in Verilog, VHDL or System Verilog.

Valuable knowledge of Xilinx/Intel-Altera FPGA architecture

Exp. with FPGA synthesis tool- Xilinx Vivado, Altera Quartus II or similar, IP Core development and integration

Experience in creating placement and timing constraints, synthesis, place and route, static timing analysis, DRC/linting analysis, FPGA Timing closure and clock-domain-crossing analysis.

Valuable knowledge of Ethernet/IP packet capture, packet processing using HDL for FPGA.

📌 Senior Research Fpga Design & Implementation For Cryptography Cdot Delhi
🏢 National Institute for Smart Government (NISG)
📍 Delhi

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