Role & responsibilities
Were Hiring: Technical Trainers VLSI ( Design Verification)
Looking for passionate engineers who love teaching and mentoring!
Roles:DV Trainer
Experience: Minimum 2+ years (or engineers aspiring to transition into training are also welcome)
Skills:
• Design Verification: UVM,system Verilog,Verilog
Locations: Bangalore / Chennai/Hyderabad
Immediate joiners preferred
Share your profile:
[email protected]
Engineers interested in moving into a training role are encouraged to apply!
#Hiring #VLSI #VerificationEngineer #UVM ##Semiconductor #BangaloreJobs #ChennaiJobs
Preferred candidate profile
📌 Member Technical Staff (Chennai)
🏢 Maven Silicon
📍 Chennai