ASIC Verification Engineer

Experience: 5 to 12 Years
Location: Bangalore | Hyderabad | Pune | Noida | Ahmedabad | Chennai

Job Responsibilities
Develop and execute verification plans for complex ASIC/SoC designs.
Build and maintain UVM-based verification environments and reusable testbenches.
Develop test cases, debug functional issues, and drive coverage closure.
Collaborate with Design, Architecture, and Validation teams to ensure first-pass silicon success.
Participate in code reviews, verification reviews, and regression management.

Required Skills
Solid hands-on experience in SystemVerilog and UVM.
Positive understanding of ASIC/SoC verification methodologies and verification planning.
Experience with assertion-based verification (SVA), functional coverage, and debugging.
Knowledge of protocols such as AXI, AHB, APB, PCIe, USB, DDR, Ethernet, or similar is preferred.
Scripting experience (Python, Perl, TCL, or Shell) is an advantage.
Excellent debugging, analytical, and communication skills.

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