Roles and Responsibilities
Design verification using SystemVerilog, UVM, PCIe, Ethernet protocols.
Develop testbenches for pre-silicon verification of ASIC designs.
Collaborate with cross-functional teams to identify requirements and develop verification plans.
Create reusable functional and gate-level simulations using SystemVerilog.
Debug complex issues in the design using waveform analysis tools like Waveform viewers.
📌 Pre Silicon Verification Engineer Pqangels Technologies Hyderabad (India)
🏢 Pqangels Technologies
📍 India
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