Job Description
Experience in ASIC/DFT simulation and silicon validation.
Detailed knowledge of DFT concepts, pattern simulation, silicon debug, and yield enhancement.
In-depth knowledge and hands-on experience in ATPG and coverage analysis.
Robust understanding of memory verification, repair, and failure root-cause analysis.
Experience with any of the following tools is required:
ATPG TestKompress
MBIST Mentor ETVerify
Simulation VCS (preferred), ModelSim
Expertise in scripting languages such as Perl, Shell, etc. is an added advantage.
Ability to work in an international team and dynamic workplace with strong communication skills.
Ability to learn and adapt to recent tools and methodologies.
Ability to multitask and work on several high-priority designs in parallel.

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📌 Dft Engineer Chennai (India)
🏢 incise infotech
📍 India