- Strong understanding of analog or digital design and verification fundamentals.
- Hands-on experience with simulation and debugging.
- Understanding of analog circuits and mixed-signal concepts.
- Ability to work effectively across analog and digital domains.
- Knowledge of SystemVerilog or UVM is a plus.
- Understanding of analog circuits or mixed-signal concepts preferred.
- Basic scripting skills preferred
Key Responsibilities
- Develop and maintain AMS verification flows and simulation environments.
- Create and execute mixed-signal test cases.
- Perform simulation debugging and failure analysis.
- Execute regressions and maintain verification documentation.
- Collaborate closely with analog and digital design teams.
Who Should Apply
- Engineers with robust fundamentals in analog or digital domains.
- Professionals interested in building expertise in AMS Verification.
- Candidates who can join immediately or are currently serving their notice period.