Category EngineeringHire Type EmployeeJob ID 12408Remote Eligible NoDate Posted 03 08 2025 Alternate Job Titles Senior ASIC Physical Design Engineer Physical Implementation Engineer - Senior Level IC Physical Design Specialist Senior SoC Physical Design Engineer We Are At Synopsys we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence from self-driving cars to learning machines We lead in chip design verification and IP integration empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation You Are You are a passionate and driven engineer with a solid foundation in integrated circuit IC design and physical implementation You thrive in fast-paced collaborative environments and are eager to tackle complex engineering challenges Your expertise in the entire digital design lifecycle from RTL to GDSII makes you a valuable contributor to any team You understand the intricacies of advanced technology nodes and are adept at balancing performance power and area requirements Your hands-on experience with industry-leading EDA tools and flows allows you to efficiently deliver high-quality designs and help drive continuous process improvements You are comfortable working independently and as part of a larger cross-functional team always seeking to understand broader project goals and customer requirements You have a keen eye for detail especially when it comes to timing closure signal integrity and design for manufacturability DFM Your scripting and CAD automation skills enable you to streamline workflows and contribute to flow development You enjoy mentoring or sharing knowledge with junior teammates and are always open to learning new methods and tools With a growth mindset you embrace feedback and new challenges and you are motivated by opportunities to innovate and make a tangible impact in the semiconductor industry What You ll Be Doing Leading and executing all phases of physical design including floorplanning placement clock tree synthesis routing extraction and timing closure for complex ASICs and SoCs Developing and enforcing timing constraints performing formal verification and optimizing clock tree structures for high-speed and low-power designs Collaborating with RTL DFT and verification teams to ensure that design requirements are met and that deliverables are aligned with project milestones Addressing and resolving issues related to signal integrity DFM and physical verification to ensure robust silicon implementation Contributing to the development and enhancement of advanced physical design flows and methodologies for deep sub-micron technologies Utilizing and automating EDA tools such as Design Compiler Physical Compiler Primetime SI ICC ICC2 FC Star-RCXT ICV and others for efficient project execution Documenting best practices and supporting the team with technical guidance during project tape-outs The Impact You Will Have Enable successful and timely delivery of high-performance low-power ASIC and SoC designs for Synopsys customers worldwide Drive technical excellence and process improvements in physical design methodologies for advanced technology nodes Contribute to the development of robust manufacturable silicon solutions that power the next generation of intelligent devices Foster cross-functional collaboration ensuring seamless integration of physical design with RTL verification and DFT teams Enhance Synopsys reputation as a leader in EDA tools and silicon enablement by delivering superior design quality and innovation Mentor and uplift the team s capabilities through knowledge sharing and continuous learning What You ll Need 2 to 3 years of hands-on experience in physical design of complex ASSP and COT designs Expertise in the full design cycle from RTL to GDSII including timing constraint development and signal integrity analysis Strong command of physical design flows and methodologies for deep sub-micron and advanced technology nodes In-depth experience with Synopsys EDA tools Design Compiler Physical Compiler Primetime SI ICC ICC2 FC Star-RCXT ICV Proficiency in scripting languages Perl Tcl Python and CAD automation techniques to enhance design productivity Experience with high-speed low-power and high-performance digital design and clock distribution Who You Are An analytical thinker with a problem-solving mindset and attention to detail A robust communicator able to clearly articulate technical issues and collaborate across diverse teams Adaptable and eager to learn new technologies in a rapidly evolving environment Self-motivated proactive and able to manage multiple priorities effectively Team-oriented open to feedback and passionate about continuous improvement and innovation The Team You ll Be A Part Of You will join a dynamic high-performing group focused on advanced IC physical design and flow development The team is dedicated to delivering state-of-the-art silicon solutions for a diverse set of applications collaborating closely with cross-functional teams in design verification and product engineering We foster a culture of innovation continuous learning and support ensuring every member has opportunities for growth and impact Rewards and Benefits We offer a comprehensive range of health wellness and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process At Synopsys we want talented people of every background to feel valued and supported to do their best work Synopsys considers all applicants for employment without regard to race color religion national origin gender sexual orientation age military veteran status or disability