- 5-8 years of hands-on physical design implementation experience along with APR flow development and PPA analysis
- STA closure at block
- Experience in Advanced process technology nodes (6/7 nm preferred)
- Experience with Cadence layout tools (Innovus, Tempus, etc..)
- Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool
- Experience in closing all the IR issues within the block based on feedback
- Should be strong in fundamentals of digital electronics and microprocessors
- Should have very good analytical skills
- Required soft skills English language proficiency, Good collaboration and interpersonal skills. Good analytical and Problem-solving skills along with robust ownership, commitment and time management.
- Bachelors or Masters with a relevant education is in the field of electronics and computer architecture
Preferred Skills
•Strong verbal communication skills
•Cadence PnR tools
•Formal verification experience
•Digital electronics and microprocessors experience