Semiconductor Solution Architect (Physical Design / Design Verification) | Bangalore | Immediate Joiners (Bangalore Metropolitan Area)

Semiconductor Solution Architect (Physical Design / Design Verification) | Bangalore | Immediate Joiners (Bangalore Metropolitan Area)

09 Aug
|
TalixoHR
|
Bangalore Metropolitan Area

09 Aug

TalixoHR

Bangalore Metropolitan Area

About the Opportunity

We are hiring experienced Semiconductor Solution Architects for a leading global engineering and technology consulting organization delivering advanced silicon design solutions for enterprise customers. This chance is ideal for professionals with deep expertise in SoC Physical Design or SoC Design Verification who have successfully driven multiple chip tape-outs on advanced technology nodes.

Location: Bangalore

Experience: 12+ Years / 14+ Years

Work Mode: Work From Office

Role 1: Physical Design Solution Architect

Key Responsibilities

- Lead end-to-end Physical Design implementation for complex SoCs.
- Define floorplanning, partitioning, clocking, power, congestion, and implementation strategies.
- Drive PPA optimization from specification through GDS-II.
- Perform feasibility studies and QoR analysis.
- Guide global implementation teams and review sign-off readiness.
- Support customer solutioning and technical estimations.

Required Skills

- 12+ years of Physical Design experience.
- Multiple tape-outs on 10nm or below technology nodes.
- Strong expertise in:
- Floorplanning
- CTS
- Timing Closure
- Power Optimization
- Hands-on experience with:
- Synopsys ICC2 / Fusion Compiler
- Cadence Innovus
- UPF and Multi-Voltage Design experience.
- Large SoC implementation (>100M gates).
- Experience supporting multiple projects simultaneously.

Good to Have





- 5nm / 3nm implementation
- Chiplet Architecture
- 3DIC
- HBM Integration
- HPC or Automotive SoCs
- AI-driven EDA tools (DSO, Cerberus, etc.)

Role 2: Design Verification Solution Architect

Key Responsibilities

- Define verification architecture and strategy for large SoCs.
- Lead SoC/IP verification through tape-out.
- Build and guide UVM-based verification environments.
- Drive coverage closure and verification planning.
- Lead emulation, FPGA, low-power, and performance verification.
- Standardize verification methodologies and automation.

Required Skills

- 12+ years of Design Verification experience.
- Multiple successful SoC verification tape-outs.
- Expert in:
- SystemVerilog
- UVM
- Assertions
- Experience with:
- SoC Boot Verification
- ARM / RISC-V Subsystems
- Security Subsystems
- NoC
- Debug
- Experience with:
- PCIe
- DDR
- Ethernet
- UCIe
- Knowledge of Palladium, Zebu, or Veloce.
- AI-assisted verification workflows.

Good to Have

- Formal Verification
- Functional Safety
- Portable Stimulus (PSS)
- Hardware/Software Co-Verification
- HBM/HMC Memory Systems

Job Details

- Experience: 12+ Years / 14+ Years
- Location: Bangalore
- Work Mode: Work From Office
- Compensation: Best in Industry (Aligned with Experience)
- Notice Period: Immediate to Short Joiners Preferred

📌 Semiconductor Solution Architect (Physical Design / Design Verification) | Bangalore | Immediate Joiners (Bangalore Metropolitan Area)
🏢 TalixoHR
📍 Bangalore Metropolitan Area

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