- Experience in communication product design and development
- Experience on Xilinx FPGA s with the Vivado platform.
- Must have a positive understanding of SPI, AIC and JESD interfaces
- Must have experience in Performance verification and validation and ILA debugging.
- Must have experience in integrating Xilinx IPs such as FFT/IFFT, Turbo decoder/Encoder, etc.
- Must have good knowledge in fixed-point signal processing.
- Having experience working with a system generator tool is an added advantage.