Responsibilities

Technical Leadership & Strategy (40%)

Define and own the end-to-end chip design strategy, methodology, and technology roadmap across all design verticals — SoC, Analog, Digital, Product & Test Engineering, Design Packaging, Verification and DFT.
Establish design standards, best practices, and quality benchmarks to ensure silicon correctness, power-performance-area (PPA) targets, and first-silicon success rates.
Evaluate and adopt state-of-the-art EDA toolchains (Cadence, Synopsys, Siemens EDA) and emerging design methodologies to maintain competitive advantage.
Provide architectural guidance on SoC partitioning, IP integration, mixed-signal co-design, and design-for-manufacturability (DFM) across advanced process nodes.

Team Management & People Leadership (30%)

Directly manage all vertical leads and engineering managers SoC, Analog, Digital, Product & Test Engineering, Design Packaging, Verification and DFT.
Set explicit goals, conduct regular reviews, and create individual development plans to build a high-performing, future-ready engineering organization.




Drive talent acquisition strategy in partnership with HR; define technical interview frameworks and competency benchmarks for senior engineering hires.
Foster a culture of technical excellence, collaboration, and continuous learning across a team of 12–20+ direct and indirect reports.

Project Monitoring & Cross-Vertical Coordination (15%)

Engage regularly with all vertical leaders and project managers to understand project status, interdependencies, resource constraints, and technical risks.
Supervise and monitor all active R&D; projects from architecture definition through tapeout, ensuring milestones are met and technical blockers are resolved promptly.
Facilitate cross-functional design reviews, tapeout readiness reviews, and silicon bring-up planning sessions to align all engineering verticals.
Serve as the primary technical escalation point for critical design issues, guiding root-cause an

📌 Director- R&D Technical Head (Hyderabad)
🏢 Semtech
📍 Hyderabad