Sr. Silicon Validation Engineer 1_2063 (Bengaluru)

Sr. Silicon Validation Engineer 1_2063 (Bengaluru)

10 Aug
|
TESSOLVE
|
Bengaluru

10 Aug

TESSOLVE

Bengaluru

3–8+ years of hands-on experience in ATE test engineering.

Strong experience on Advantest V93000 (93K) platform.

Working knowledge of SmarTest 7 (SM7) and/or SmarTest 8 (SM8).

Hands-on Experience In At Least One Domain

Digital (ATPG, Scan, Logic)

MBIST / Memory test / BISR / BIRA

HSIO (PCIe, USB, DDR, HBM, SerDes)

Analog / Power / Mixed-Signal

Experience in test program bring-up, debug, characterization, and production release.

Understanding of wafer sort and final test flows.

Exposure to Mobile, HPC, AI, Server, or Networking SoCs.

Proficiency in Java (SM8) or C++ (SM7).

Scripting knowledge in Python is a solid plus.

Experience with automation, data analysis, and debug tools.

📌 Sr. Silicon Validation Engineer 1_2063 (Bengaluru)
🏢 TESSOLVE
📍 Bengaluru

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