Physical Design Engineer (Bengaluru)

Physical Design Engineer (Bengaluru)

10 Aug
|
Weekday AI
|
Bengaluru

10 Aug

Weekday AI

Bengaluru

This role is for one of the Weekday's clients
Min Experience: 2+ years
Location: Bengaluru, Karnataka, India
JobType: full time
We are seeking a talented Physical Design Engineer (PNR) to join our semiconductor engineering team. The ideal candidate will have hands-on experience in ASIC Physical Design, with expertise in Place & Route (PNR), floorplanning, power planning, and timing closure. You will play a key role in delivering high-performance, low-power, and area-efficient chip designs while collaborating closely with design, STA, and DFT teams throughout the implementation lifecycle.
This role offers the opportunity to work on advanced semiconductor technologies and contribute to the successful tape-out of complex ASIC designs.
Key Responsibilities
Perform end-to-end ASIC Physical Design (Place & Route) implementation for complex chip designs.
Execute physical design activities including floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and design closure.
Optimize designs for timing, power, area, and congestion while ensuring implementation quality.




Perform physical verification, design rule checks (DRC), and support engineering change orders (ECOs).
Collaborate with RTL, STA, DFT, and verification teams to resolve implementation and timing-related issues.
Analyze timing reports and implement fixes to achieve timing closure.
Support low-power implementation and optimization methodologies.
Work with physical design methodologies, automation, and best practices to improve implementation efficiency.
Debug implementation issues and recommend design improvements to meet project goals.
Contribute to continuous improvement of physical design flows and automation.
RequirementsMust-Have Skills
2–5 years of experience in ASIC Physical Design / Place & Route (PNR).
Strong hands-on experience with Floorplanning.
Expertise in Power Planning.
Experience with Placement and physical optimization.
Solid knowledge of Clock Tree Synthesis (CTS).
Hand

📌 Physical Design Engineer (Bengaluru)
🏢 Weekday AI
📍 Bengaluru

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