Introduction
We are looking for a Senior UCIe Verification Engineer with solid experience in SystemVerilog/UVM-based verification of high-speed interconnects and SoC subsystems. The ideal candidate should have hands-on experience in verifying UCIe (Universal Chiplet Interconnect Express) IP and should have contributed to at least 1–2 successful SoC tape-outs. The role involves developing reusable verification environments, protocol compliance verification, subsystem/SoC integration, and driving verification closure.
About Edgecortix
At Edgecortix we are a deep-tech startup revolutionizing edge computing with artificial intelligence and novel high efficiency silicon on chip design. Originating from multiple years of research, our unique AI hardware & software co-design principle and the Dynamic Neural Accelerator ® AI processor IP are geared towards positively disrupting the rapidly growing artificial intelligence edge hardware space and bring the power of AI and machine learning to all kinds of devices. Our operations are headquartered in Tokyo, Japan, with offices in Singapore,
Virginia, California in the US. In addition, we are starting a new Design Center in India, located in Hyderabad.
The Team
As an engineering driven company we are working to define and solve the hardest problems in AI including computer vision, speech, and natural language, geared towards real-time capabilities on small to medium form factor devices. We originated out of multiple years of research, as such at our core we value learning, intellectual curiosity, and self-starters. We have the ambitious goal of enabling cloud-level performance with significantly better energy-efficiency for AI inference at the edge.
Your Role and Responsibilities:
Develop and execute comprehensive verification plans for UCIe IP, subsystems, and SoC integration.
Build reusable SystemVerilog/UVM verification environments from scratch.
Develop constrained-random and directed test scenarios to verify UCIe function