Key Skill Expectations:
Robust experience in FPGA Design and Validation, with focus on core design and validation activities
Hands-on experience in validating FPGA builds flows / tool flows
Proficiency in using oscilloscopes
Mandatory knowledge of Ethernet protocols
Experience with scripting languages, preferably TCL
Good understanding of Lint and CDC concepts (desired)
Exposure to AI Agents and Prompt Engineering (added advantage)
Experience Level: 8+ years of relevant industry experience