Overview
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead Design Verification Engineer to join our PCIe Express IP Products team in Bangaluru, India. The successful candidate will participate in pre-silicon RTL Verification activities related to PCIe Controller SoftIP development, on leading-edge PCI-Express and CXL controller technologies. This is a Full Time position, reporting to the local onsite Verification management.
Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite while also allowing for two days of remote work.
Responsibilities
Duties in this position will include:
Testbench and test sequence development for verification of recent controller technologies and features
Functional coverage planning, coverage item coding, and test suite augmentation to achieve Functional Coverage
Regression test development, monitoring, debug/triage, and correction to test environment, sequences,



debug of controller RTL design
Development & support of Verification environment scripting and capabilities
Qualifications
Bachelors Degree or above in EE/CS, at least 7+ years experience with HDL logic Design-Verification
System Verilog / UVM testbench, Verilog/System Verilog logic design/RTL fluency a must
Pre-existing Experience / familiarity with PCI-Express controller and protocol required
Working experience with Python and TCL scripting languages preferred
About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the found

📌 Lead MTS Verification Engineering (India)
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