Job Title: Senior Engineer – FPGA (HDD)
Location: Chennai, India
Experience: 5–7 Years
Employment Type: Full-Time (Permanent)
About the Role
We are looking for a highly skilled Senior FPGA Engineer to join a leading organization in the Electronics and Defense domain. The ideal candidate will have hands-on experience in FPGA design and development, RTL design using VHDL/Verilog, timing analysis, and high-speed interface protocols. This role offers an opportunity to work on cutting-edge hardware systems and advanced digital signal processing applications.
Key Responsibilities
Perform requirements generation and FPGA RTL design using VHDL/Verilog.
Work with FPGA development tools such as Vivado and Quartus.
Develop and maintain FPGA designs adhering to the DO-254 development lifecycle.
Perform synthesis, Static Timing Analysis (STA), timing closure, and design constraint implementation.
Develop and optimize high-speed interfaces including PCIe, DDR, JESD, and Ethernet.
Continuously improve FPGA testbenches, simulation environments, and validation methodologies.




Balance architectural trade-offs involving area, power, and performance requirements.
Perform system-level debugging and troubleshooting using Tcl scripting and logic analyzers.
Contribute to Radar Digital Signal Processing (DSP) implementations and optimizations.
Required Skills
Strong proficiency in VHDL and/or Verilog.
Hands-on experience with FPGA tools such as Vivado or Quartus.
Good understanding of the DO-254 FPGA development lifecycle.
Expertise in Static Timing Analysis (STA), floorplanning, and timing closure.
Experience working with Xilinx and/or Altera (Intel) FPGA architectures.
Solid knowledge of PCIe, Ethernet, DDR, JESD, and Multi-Gigabit Transceivers (SERDES).
Experience in high-speed digital design and signal processing applications.
Strong analytical and problem-solving skills.
Preferred Qualifications
Exposure to Radar Digital Signal Processing.
Experience with Tcl scripting for automation a

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