EnCharge AI is a leader in advanced AI hardware and software systems for
edge-to-cloud computing. EnCharge’s robust and scalable next-generation
in-memory computing technology provides orders-of-magnitude higher compute
efficiency and density compared to today’s best-in-class solutions. The
high-performance architecture is coupled with seamless software integration and
will enable the immense potential of AI to be accessible in power, energy, and
space constrained applications. EnCharge AI launched in 2022 and is led by
veteran technologists with backgrounds in semiconductor design and AI systems.

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The Role

We are seeking a thorough SOC Physical Verification & Integration Specialist to
drive the physical assembly and signoff of our next-generation SOCs. In this
role, you will own the physical integration strategy from the floorplan stage
through to tapeout, ensuring seamless assembly of massive multi-hierarchical
blocks. You will act as the critical bridge between block-level implementation,




top-level integration, and final foundry signoff, ensuring that complex physical
bottlenecks are resolved without compromising power, performance, or area (PPA).

Key Responsibilities
* Top-Level Physical Integration: Drive the full-chip physical assembly of very
large-scale SOCs (e.g., multi-billion transistor designs). Manage top-level
floorplanning, bump planning, global power grid (PG) integration, and
top-level clock/routing integration.
* Hierarchical Verification Methodology: Architect and deploy highly effective,
hierarchical physical verification (PV) flows. Define the boundary
conditions, abstraction models, and interface rules required to assemble
heavily partitioned, massive-scale designs.
* Signoff Execution & Debugging: Own full-chip DRC, LVS, ERC, Antenna, ESD, and
Latch-up signoff using industry-standard tools (e.g., Siemens Calibre) at
advanced process nodes (5nm, 3nm, or below).

📌 Principal SOC Physical Verification (Bengaluru)
🏢 EnCharge AI
📍 Bengaluru