Senior Design Verification Engineer (Hyderabad)

Senior Design Verification Engineer (Hyderabad)

10 Aug
|
Lattice Semiconductor
|
Hyderabad

10 Aug

Lattice Semiconductor

Hyderabad

Lattice Overview
There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D;, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.
Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.
Job Description:
Responsibilities:
Draft DV scope, strategy & feasibility in response to marketing requirements
Develop test plans based on Design Specifications




Design & Implement constrained-random testbenches & metrics
Code & Execute tests, Debug encountered issues
Collate & Analyze test results to closure
Requirements:
BS or MS in Computer/Electronics/Electrical Engineering with a minimum of 5 years of relevant design verification experience.
Valuable communication, collaboration & documentation skills.
Good grasp of & Hands-on experience with SystemVerilog/UVM, with solid understanding of different available SV/UVM constructs. Experience with languages like Python, make, C, C++ is an advantage.
Good analysis & debugging skills. Understanding of HDL & FPGA concepts is an advantage.
Experience with industry standard digital design simulators & debugging tools. Experience with Siemens EDA tools specifically is an advantage. Experience with Perforce, Git, Jenkins, & generative AI is also an advantage.
Experience in the following technology areas is an advantage

📌 Senior Design Verification Engineer (Hyderabad)
🏢 Lattice Semiconductor
📍 Hyderabad

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