DDR & HBM Validation Engineer (Bengaluru)

DDR & HBM Validation Engineer (Bengaluru)

10 Aug
|
Graphcore
|
Bengaluru

10 Aug

Graphcore

Bengaluru

Job Summary
Reporting to the Memory Validation leadership team, the DDR & HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms.
The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory subsystem functionality, performance and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation and infrastructure.
The Team
The Memory Validation team sits within the Validation organisation and is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products.
The team supports DDR and HBM validation activities throughout the product lifecycle, from first silicon through production readiness. Engineers work closely with architecture, RTL, firmware,



characterization, systems and platform teams to ensure memory technologies meet functionality, performance, reliability and performance objectives.
Responsibilities and Duties
Execute validation and bring-up activities for DDR and HBM memory subsystems
Verify memory bring-up software, firmware and scripts against defined project requirements
Debug firmware, hardware and system-level issues and contribute to root-cause analysis activities
Analyse system logs, validation data and characterization results to identify failures and performance issues
Perform PHY characterization and analog-level analysis during stress testing and validation activities
Develop and execute functional, stress, performance and corner-case validation tests
Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation
Characterize memory bandwidth, latency, training behaviour and su

📌 DDR & HBM Validation Engineer (Bengaluru)
🏢 Graphcore
📍 Bengaluru

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