About the Role

- We are looking for a skilled Design Verification Engineer with robust experience in IP/SoC verification and expertise in high-speed protocols and networking interfaces.

Key Responsibilities

- Perform IP/SoC level verification using advanced methodologies

- Develop and execute testbenches using System Verilog and UVM

- Work on Ethernet MAC verification and high-speed interfaces

- Debug issues, analyze coverage, and implement assertions

- Collaborate with design teams for SoC integration and verification closure

- Ensure complete functional and coverage closure

Required Skills & Qualifications :

- Strong experience in IP/SoC Verification

- Hands-on expertise in Ethernet MAC verification

- Proficiency in System Verilog and UVM

- Experience in debugging, coverage analysis, and assertions

- Strong experience in testbench development and verification methodologies

- Good understanding of SoC architecture and integration

- Exposure to high-speed protocols like AXI, AHB, APB, PCIe, USB, Ethernet

- DRC & Coverage Analysis

- Cadence Tools

- SDF / Timing Simulation

- Design for Testability

- LBIST

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