1. Architect, design, and implement FPGA-based solutions for high-speed communication interfaces

(Ethernet, MIPI-CSI, PCIe, NMEA).
1. Develop RTL code (VHDL/Verilog/System Verilog) and optimize for performance, area, and power.
2. Perform simulation, verification, and debugging using industry-standard tools.
3. Collaborate with hardware, software, and system engineering teams to integrate FPGA designs

into larger systems.
1. Conduct timing analysis, synthesis, and place-and-route to ensure design closure.
2. Document design specifications, test plans, and results for internal and external stakeholders.
3. Mentor junior engineers and contribute to design reviews.

Required Skills & Competencies:
1. Strong expertise in Ethernet, MIPI-CSI, PCIe, and NMEA protocol implementation.
2.



Proficiency in RTL design (VHDL/Verilog/SystemVerilog).
3. Experience with FPGA platforms (Xilinx, Intel/Altera, Lattice, or Microchip).
4. Familiarity with simulation and verification tools (ModelSim, Questa, Vivado, Quartus, etc.).
5. Solid understanding of timing closure, synthesis, and FPGA toolchains.
6. Solid problem-solving skills and ability to work in cross-functional teams.
7. Experience with embedded processors and SoC FPGA architectures.
8. Knowledge of high-speed board-level design and signal integrity.
9. Exposure to scripting languages (Python, TCL, Perl) for automation
10. Experience in aerospace domain preferred

📌 Lead Engineer - FPGA (Bhubaneswar)
🏢 CIEL HR
📍 Bhubaneswar