Overview WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry our communities and the world Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center artificial intelligence PCs gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the world s most important challenges We strive for execution excellence while being direct humble collaborative and inclusive of diverse perspectives AMD together we advance Responsibilities MTS SILICON DESIGN ENGINEERABOUT THE DEPARTMENT Central DFX CDFX is a centralized ASIC design group within AMD s Technology and Engineering organization CDFX has a global footprint with design teams located in several AMD offices in North America and Asia Our mandate is to optimize and standardize design methodology design and implementation of critical Design-for-Test DFT and Design-for-Debug DFD features for high performance adaptive compute products for data center embedded gaming and PC markets It is also responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD THE ROLE We are seeking an experienced design verification engineer with hands on experience on architecting and developing efficient scalable UVM based test-bench test-bench components test-planning and execution of testplan coverage development and closure Candidate should have working experience with global teams spread across different geography and time-zones KEY RESPONSIBILITIES ASIC design verification experience 6 to 10 years IP level test plan creation and development of testbench test-bench components including functional coverage for Debug IP designs Developing scalable verification components random-constrained stimulus and debugging regression failures DV coverage analysis Provide technical guidance and innovative ideas to improve quality processes and productivity Understanding the existing test bench setup and look for opportunities to improve the existing test bench Adhering to coding guideline practices develop and implement code review process Technical support to SOC teams internal customers on Debug IP deliverables and tape out readiness signoff Collaborate with global design verification teams and drive effectively the execution of the verification plans Lead a small team with technical expertise Your commitment to innovating as a team demonstrated through excellent communication knowledge of proper documentation techniques and independently driving tasks to completion PREFERRED EXPERIENCE Strong understanding the design and verification life cycle Hands on verification experience with C C SystemVerilog UVM testbench development Hands on experience with coverage planning coding and coverage closure Experience with IP verification and AMBA bus protocols Experience in clocking reset power-up sequences and power management verification Knowledge of microprocessor design-for-debug DFD logic will be a plus Understanding of low power design verification techniques is a plus ACADEMIC CREDENTIALS Bachelors or Masters degree in computer engineering Electrical Electronics Engineering LI-BM2 Qualifications Advantages offered are described AMD benefits at a glance AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee-based recruitment services AMD and its subsidiaries are equal opportunity inclusive employers and will consider all applicants without regard to age ancestry color marital status medical condition mental or physical disability national origin race religion political and or third-party affiliation sex pregnancy sexual orientation gender identity military or veteran status or any other characteristic protected by law We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process