Job Details We are looking for an enthusiastic engineer to work with Intel s latest cutting-edge memory technologies As part of the Memory Validation Team you will enable validate and debug the Memory subsystem within Intel s mobile desktop and IOT CPU products As a Memory Electrical Validation Engineer Responsibilities will include but are not limited to Define electrical validation strategy for memory IO interfaces to achieve optimized electrical performance and meet product production goals Validate circuit analog performance electrical signal integrity compliance to industry standard specifications and system level margin for stable operation and production target prediction Define MRC Memory Reference Code requirements for validation and margin optimization and analyzes validates debugs and optimizes MRC steps and values to optimize margins and quality Conduct and participate in multidisciplinary research in the design development testing validation and utilization of memory IO and mixed signal architectures inclusive of industry standard datacom applications and custom Intel interfaces Develop procedures analysis and designs for validation validation infrastructure and systems margin validation Analyse internal and external customer returns with emphasis on improving yields and driving test escape closure Apply and use independent evaluation to select components and equipment based on analysis of specifications performance and reliability o Perform debug to identify root causes and resolves all functional and triage failures for electrical issues Test interactions between various electrical design features using validation infrastructure Prepare validation specifications evaluates IP and generates test reports Ensure products conform to standards and specifications Present data and analysis to technical forums Qualifications Minimum Qualifications EE Electrical Engineering or Computer Science BS or MS degree 6-12 years of hands-on experience in Memory Electrical Analog Validation such as signal integrity and signal margining validation Experience in Memory Firmware Experience in Mixed signal IP electrical validation Proficiency in DDR5 LPDDR5 Preferred Qualifications Familiar with Intel collateral PDG EDS and tools ITP Python SV Hands-on usage of relevant lab equipment and debugs Technical depth and leadership skills Job Type Experienced Hire Shift Shift 1 India Primary Location India Bangalore Additional Locations Business group The Silicon Engineering Group SIG is a worldwide organization focused on the development and integration of SOCs Cores and critical IPs from architecture to manufacturing readiness that power Intel s leadership products This business group leverages an incomparable mix of experts with different backgrounds cultures perspectives and experiences to unleash the most creative amazing and exciting computing experiences Posting Statement All qualified applicants will receive consideration for employment without regard to race color religion religious creed sex national origin ancestry age physical or mental disability medical condition genetic information military and veteran status marital status pregnancy gender gender expression gender identity sexual orientation or any other characteristic protected by local law regulation or ordinance Position of Trust N A Work Model for this Role This role will require an on-site presence Job posting details such as work model location or time type are subject to change ADDITIONAL INFORMATION Intel is committed to Responsible Business Alliance RBA compliance and ethical hiring practices We do not charge any fees during our hiring process Candidates should never be required to pay recruitment fees medical examination fees or any other charges as a condition of employment If you are asked to pay any fees during our hiring process please report this immediately to your recruiter